meta : raise the compute view limit for buffers with few tensors (#31447)

• ggml-backend-meta : minimum number of compute views per buffer

Assisted-by: Claude Opus 5.5

• tests : revert the deepseek41 test model to 6 layers

Assisted-by: Claude Opus 5.5

model: add Kimi-K3.1-Pro text model (#31779)

• model: add Kimi-K3.1-Pro text model

K3 with the full-attention MLA layers replaced by DSA: on this checkpoint 24
of the 93 layers carry a lightning indexer (32 heads x 128, top_k 2048, no
rope). The KDA (linear-attention) layers and the rest of the K3 skeleton -
cross-layer residuals, latent MoE, situ, MLA output gate, full-rank KDA gate -
are unchanged, so this reuses the K3 graph and converter and adds the indexer.

Indexer:

• the selection is an additive mask over the whole cache, not a gather of
  the top-k rows, so it reuses the existing sparse flash attention path;
  off that path the mask stays correct but still costs a kq over the cache
• the indexer key LayerNorm takes its eps from the model's rms_norm_eps,
  because dsa_config declares no eps of its own

Graph and cache:

• new arch with four indexer tensors per DSA layer, and a hybrid memory
  that keeps a K-only MLA cache for those layers, recurrent state for the
  KDA layers, and the indexer key cache
• the graph node budget shares the K3 entry

Conversion:

• KimiK31Model(KimiK3Model), picked by KimiK31ForConditionalGeneration
• dsa_config becomes attention.indexer.{head_count,key_length,top_k,types}
  plus the indexer LayerNorm eps; the layer list is 1-indexed like
  linear_attn_config's, and the converter asserts that it covers exactly
  the full-attention layers
• the routed experts stay MXFP4 and are repacked as in K3, not dequantized
• the vision tower and mm_projector are skipped: text only for now
• the arch key follows the checkpoint's own model_type ("kimi_k31") and the
  loader registers KimiK31ForConditionalGeneration; the release name carries
  a -Pro suffix that nothing in the config or the tensor names uses

Quantisation: the indexer's q_b, k and proj are kept out of the quant
overrides, since the top-k selection is sensitive to their precision.

Verified on an 8-layer slice against the HF checkpoint: 38 tensors checked
exactly, the indexer metadata against the config, and the selection against
full attention - identical PPL at top_k beyond the context length, divergent
once top_k is forced below it. Arch test fixture and the full arch suite pass.

• converter: avoid clutter in the k3 base

• narrow comment to match model

• update metal fusion expectations

• restore

• sync with PR 31733 refactoring

hexagon: conv_2d optimizations and support for conv_3d (#31814)

• hexagon: Generalization of CONV_2D implementation for CONV_3D

• New op HTP_OP_CONV_3D is wired through htp-ops.h, main.c (shares op_conv_2d) and the op remap in htp-kparams.cpp.
• conv_3d runs on the existing HMX tiled (implicit GEMM) conv2d path. KD and KH are folded into one virtual kernel row (KDKH), and output rows are counted as NOD*OH.
• htp_kparams_solve_conv3d checks the conv_3d layout and calls the tiled solver htp_kparams_conv2d_tiled, which takes an is3d flag.
• The tiled kernel takes the sizes and strides that differ between conv_2d and conv_3d from a struct htp_conv_geom. Only the input stage unfolds depth.
• 256-entry DMA queue can no longer overflow

Assisted-by: Claude Code

• hexagon: modify checking to eliminate divide-by-zero hazards

• hexagon: conv2d tiled: compute the conv_3d unfold divisors on the host

The KH and OH fastdiv values used to unfold conv_3d kh into (kd, kh) and
oh into (od, oh) were built per op on the device, each with a 64-bit
divide. Pass them in the kernel params instead; they fit in the space the
window variant already reserves, so the struct size does not change.

Assisted-by: Claude Code

• hexagon : preserve fold scheduling in conv2d for small size

hexagon : support arbitrary positive conv2d strides
Support positive horizontal strides for WHCN and CWHN inputs. Preserve
load/shuffle paths for strides 1/2 and use gather for larger strides.

hexagon : improve conv2d tile size selection

Prefer the largest feasible output-channel block and derive spatial
chunk capacity from VTCM usage. Compare capacity and thread-aligned
candidates using per-thread work and chunk overhead.

Co-authored-by: Yiwei Shao yiwei@aizip.ai

• hex-conv: fix compiler warning

Co-authored-by: Yiwei Shao yiwei@aizip.ai
Co-authored-by: Max Krasnyansky maxk@qti.qualcomm.com

cli : fix crash on invalid UTF-8 in prompt or files (#31563)

Assisted-by: Claude

tests : qualify isnan and signbit with std:: (#31791)

• tests : qualify isnan and signbit with std::

The unqualified calls rely on the C math.h names also being present in the
global namespace, which is not the case for the NetBSD 11.99.9/x86_64 gcc
14.4.0 build reported in the issue. Prefix the calls with std:: to select
the standard C++ overloads declared by .

ref: ggml-org/ggml#1681

Assisted-by: dsh:llama.cpp/ggml-org/Qwen3.8-Flash-Next-GGUF (MacBook, M5 Max, 128GB)

• tests : qualify C math calls with std::

Follow-up to the isnan / signbit fix: make the remaining math calls in
test-quantize-fns.cpp consistent with the std:: isfinite / max / numeric_limits
already used in the same file.

The float variants are overloads in C++, not distinct names, so the mapping is
fabsf -> std::fabs, copysignf -> std::copysign, nextafterf -> std::nextafter -
not std::fabsf & friends, which do not exist in libstdc++ and would break the
gcc build. NAN and INFINITY are macros and are left unqualified.

Only behavioural difference: array_rmse() fed a double accumulator to sqrtf(),
now std::sqrt() keeps the computation in double. The result is more accurate
and differs from the previous value by at most 1.4e-7 relative, three orders of
magnitude below the tightest tolerance in this test.

Assisted-by: dsh:llama.cpp/ggml-org/Qwen3.8-Flash-Next-GGUF (MacBook, M5 Max, 128GB)

tests : override hardware_concurrency in CI (#31797)

The self-hosted CPU runners are containers with 8 CPUs, but
std::thread::hardware_concurrency reports the cores of the host. The
table mode of test-llama-context sizes its pool from that count, so it
runs 4 models x 8 threads on an 8-CPU job and hangs.

Add TEST_ARG_HARDWARE_CONCURRENCY and TEST_ARG_PARALLEL_WORKERS as the
defaults for the auto-selected counts of test-llama-context and of
test-backend-ops, and set them to 8 and 4 for cpu-x64-high-perf.

Assisted-by: dsh:llama.cpp/ggml-org/Qwen3.8-Flash-Next-GGUF (RTX 5090 32GB, DDR5 128GB)

cmake : generate RC file directly without win-app.rc.in (#31718)

Signed-off-by: Adrien Gallouët angt@huggingface.co

opencl: support repeat for f16, i32, i16, bf16 (#31782)

• opencl: add f16 repeat

Assisted-by: Codex

• opencl: support repeat for i32, i16, bf16

Assisted-by: Codex

• opencl: update ops

Assisted-by: Codex

webgpu: add batched tensor API (get_tensor_n and set_tensor_n) (#31473)

• add set_tensor_n and get_tensor_n

• fix for editor-config checker

• remove the outdated comment

vulkan: detect ReBAR support, avoid BAR allocations if unavailable (#31658)