List of electronic component packaging types
Integrated circuits and certain other electronic components are put into protective packages to allow easy handling and assembly onto printed circuit boards and to protect the devices from damage. A very large number of package types exist. Some package types have standardized dimensions and tolerances, and are registered with trade industry associations such as JEDEC and Pro Electron. Other types are proprietary designations that may be made by only one or two manufacturers. Integrated circuit packaging is the last assembly process before testing and shipping devices to customers.
Occasionally specially-processed integrated circuit dies are prepared for direct connections to a substrate without an intermediate header or carrier. In flip chip systems the IC is connected by solder bumps to a substrate. In beam-lead technology, the metallized pads that would be used for wire bonding connections in a conventional chip are thickened and extended to allow external connections to the circuit. Assemblies using "bare" chips have additional packaging or filling with epoxy to protect the devices from moisture.
Through-hole packages
[edit]Through-hole technology uses holes drilled through the printed circuit board (PCB) for mounting the components. The component has leads that are soldered to pads on the PCB to electrically and mechanically connect them to the PCB.
| Acronym | Full name | Remark |
|---|---|---|
| SIP | Single in-line package | |
| DIP | Dual in-line package | 0.1 in (2.54 mm) pin spacing, rows 0.3 in (7.62 mm) or 0.6 in (15.24 mm) apart. Other row spacings are used much less frequently, like 0.4 in (10.2 mm) and 0.9 in (22.9 mm). |
| CDIP | Ceramic DIP[1] | |
| CERDIP | Glass-sealed ceramic DIP[1] | |
| QIP | Quad in-line package | Like DIP but with staggered (zig-zag) pins.[1] |
| SKDIP | Skinny DIP | Standard DIP with 0.1 in (2.54 mm) pin spacing, rows 0.3 in (7.62 mm) apart.[1] |
| SDIP | Shrink DIP | Non-standard DIP with smaller 0.07 in (1.78 mm) pin spacing.[1] |
| ZIP | Zig-zag in-line package | |
| MDIP | Molded DIP[2] | |
| PDIP | Plastic DIP[1] |
Surface mount
[edit]| Acronym | Full name | Remark |
|---|---|---|
| CCGA | Ceramic column-grid array (CGA)[3] | |
| CGA | Column-grid array[3] | |
| CERPACK | Ceramic package[4] | |
| CQGP[5] | Ceramic Quad Grid Array Package | |
| LLP | Lead-less lead-frame package | A package with metric pin distribution (0.5–0.8 mm pitch)[6] |
| LGA | Land grid array[3] | |
| LTCC | Low-temperature co-fired ceramic[7] | |
| MCM | Multi-chip module[8] | |
| MICRO SMDXT | Micro surface-mount device extended technology[9] |
Chip on board is a packaging technique that directly connects a die to a PCB, without an interposer or lead frame.
Chip carrier
[edit]A chip carrier is a rectangular package with contacts on all four edges. Leaded chip carriers have metal leads wrapped around the edge of the package, in the shape of a letter J. Leadless chip carriers have metal pads on the edges. Chip carrier packages may be made of ceramic or plastic and are usually secured to a printed circuit board by soldering, though sockets can be used for testing.
| Acronym | Full name | Remark |
|---|---|---|
| BCC | Bump chip carrier[3] | |
| CLCC | Ceramic lead-less chip carrier[1] | |
| LCC | Lead-less chip carrier[3] | Contacts are recessed vertically. |
| LCC | Leaded chip carrier[3] | |
| LCCC | Leaded ceramic-chip carrier[3] | |
| DLCC | Dual lead-less chip carrier (ceramic)[3] | |
| PLCC | Plastic leaded chip carrier[1][3] |
Pin grid arrays
[edit]| Acronym | Full name | Remark |
|---|---|---|
| OPGA | Organic pin-grid array | |
| FCPGA | Flip-chip pin-grid array[3] | |
| PGA | Pin-grid array | Also known as PPGA[1] |
| CPGA | Ceramic pin-grid array[3] |
Flat packages
[edit]| Acronym | Full name | Remark |
|---|---|---|
| – | Flat-pack | Earliest version metal/ceramic packaging with flat leads |
| CFP | Ceramic flat-pack[3] | |
| CQFP | Ceramic quad flat-pack[1][3] | Similar to PQFP |
| BQFP | Bumpered quad flat-pack[3] | |
| DFN | Dual flat-pack | No lead[3] |
| ETQFP | Exposed thin quad flat-package[10] | |
| PQFN | Power quad flat-pack | No-leads, with exposed die-pad[s] for heatsinking[11] |
| PQFP | Plastic quad flat-package[1][3] | |
| LQFP | Low-profile quad flat-package[3] | |
| QFN | Quad flat no-leads package | Also called as micro lead frame (MLF).[3][12] |
| QFP | Quad flat package[1][3] | |
| MQFP | Metric quad flat-pack | QFP with metric pin distribution[3] |
| HVQFN | Heat-sink very-thin quad flat-pack, no-leads | |
| SIDEBRAZE[13][14] | [clarification needed] | [clarification needed] |
| TQFP | Thin quad flat-pack[1][3] | |
| VQFP | Very-thin quad flat-pack[3] | |
| TQFN | Thin quad flat, no-lead | |
| VQFN | Very-thin quad flat, no-lead | |
| WQFN | Very-very-thin quad flat, no-lead | |
| UQFN | Ultra-thin quad flat-pack, no-lead | |
| ODFN | Optical dual flat, no-lead | IC packaged in transparent packaging used in optical sensor |
Small outline packages
[edit]A small outline integrated circuit (SOIC) is a surface-mounted integrated circuit (IC) package which occupies an area about 30–50% less than an equivalent dual in-line package (DIP), with a typical thickness being 70% less. They are generally available in the same pin-outs as their counterpart DIP ICs.
| Acronym | Full name | Remark |
|---|---|---|
| SOP | Small-outline package[1] | |
| CSOP | Ceramic small-outline package | |
| DSOP | Dual small-outline package | |
| HSOP | Thermally-enhanced small-outline package | |
| HSSOP | Thermally-enhanced shrink small-outline package[15] | |
| HTSSOP | Thermally-enhanced thin shrink small-outline package[15] | |
| mini-SOIC | Mini small-outline integrated circuit | |
| MSOP | Mini small-outline package | Maxim uses the trademarked name μMAX for MSOP packages |
| PSOP | Plastic small-outline package[3] | |
| PSON | Plastic small-outline no-lead package | |
| QSOP | Quarter-size small-outline package | The terminal pitch is 0.635 mm.[3] |
| SOIC | Small-outline integrated circuit | Also known as SOIC NARROW and SOIC WIDE |
| SOJ | Small-outline J-leaded package | |
| SON | Small-outline no-lead package | |
| SSOP | Shrink small-outline package[3] | |
| TSOP | Thin small-outline package[3] | |
| TSSOP | Thin shrink small-outline package[3] | |
| TVSOP | Thin very-small-outline package[3] | |
| VSOP | Very-small-outline package[15] | |
| VSSOP | Very-thin shrink small-outline package[15] | Also referred as MSOP = micro small-outline package |
| WSON | Very-very-thin small-outline no-lead package | |
| USON | Very-very-thin small-outline no-lead package | Slightly smaller than WSON |
Chip-scale packages
[edit]According to IPC's standard J-STD-012, Implementation of Flip Chip and Chip Scale Technology, in order to qualify as chip scale, the package must have an area no greater than 1.2 times that of the die and it must be a single-die, direct surface mountable package. Another criterion that is often applied to qualify these packages as CSPs is their ball pitch should be no more than 1 mm.
| Acronym | Full name | Remark |
|---|---|---|
| BL | Beam lead technology | Bare silicon chip, an early chip-scale package |
| CSP | Chip-scale package | Package size is no more than 1.2× the size of the silicon chip[16][17] |
| TCSP | True chip-size package | Package is same size as silicon[18] |
| TDSP | True die-size package | Same as TCSP[18] |
| WCSP or WL-CSP or WLCSP | Wafer-level chip-scale package | A WL-CSP or WLCSP package is just a bare die with a redistribution layer (or I/O pitch) to rearrange the pins or contacts on the die so that they can be big enough and have sufficient spacing so that they can be handled just like a BGA package.[19] |
| PMCP | Power mount CSP (chip-scale package) | Variation of WLCSP, for power devices like MOSFETs. Made by Panasonic.[20] |
| Fan-out WLCSP | Fan-out wafer-level packaging | Variation of WLCSP. Like a BGA package but with the interposer built directly atop the die and encapsulated alongside it. |
| eWLB | Embedded wafer level ball grid array | Variation of WLCSP. |
| MICRO SMD | - | Chip-size package (CSP) developed by National Semiconductor[21] |
| COB | Chip on board | Bare die supplied without a package. It is mounted directly to the PCB using bonding wires and covered with a blob of black Epoxy.[22] Also used for LEDs. In LEDs, transparent epoxy or a silicon caulk-like material that may contain a phosphor is poured into a mold containing the LED(s) and cured. The mold forms part of the package. |
| COF | Chip-on-flex | Variation of COB, where a chip is mounted directly to a flex circuit. Unlike COB, it may not use wires nor be covered with epoxy, using underfill instead. |
| TAB | Tape-automated bonding | Variation of COF, where a flip chip is mounted directly to a flex circuit without the use of bonding wires. Used by LCD driver ICs. |
| COG | Chip-on-glass | Variation of TAB, where a chip is mounted directly to a piece of glass - typically an LCD. Used by LCD and OLED driver ICs. |
Ball grid array
[edit]Ball grid array (BGA) uses the underside of the package to place pads with balls of solder in grid pattern as connections to PCB.[1][3]
| Acronym | Full name | Remark |
|---|---|---|
| FBGA | Fine-pitch ball-grid array | A square or rectangular array of solder balls on one surface[3] |
| LBGA | Low-profile ball-grid array | Also known as laminate ball-grid array[3] |
| TEPBGA | Thermally-enhanced plastic ball-grid array | |
| CBGA | Ceramic ball-grid array[3] | |
| OBGA | Organic ball-grid array[3] | |
| TFBGA | Thin fine-pitch ball-grid array[3] | |
| PBGA | Plastic ball-grid array[3] | |
| MAP-BGA | Mold array process - ball-grid array [23] | |
| UCSP | Micro (μ) chip-scale package | Similar to a BGA (A Maxim trademark example)[17] |
| μBGA | Micro ball-grid array | Ball spacing less than 1 mm |
| LFBGA | Low-profile fine-pitch ball-grid array[3] | |
| TBGA | Thin ball-grid array[3] | |
| SBGA | Super ball-grid array[3] | Above 500 balls |
| UFBGA | Ultra-fine ball-grid array[3] |
Transistor, diode, small-pin-count IC packages
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- MELF: Metal electrode leadless face (usually for resistors and diodes)
- SOD: Small-outline diode
- SOT: Small-outline transistor (also SOT-23, SOT-223, SOT-323)
- TO-XX: wide range of small pin count packages often used for discrete parts like transistors or diodes